Display apparatus and control method thereof

ABSTRACT

An example display apparatus includes a display panel configured to drive a frame of a first resolution at a first frame rate, a communication interface comprising circuitry configured to receive content, and a processor configured to, based on a frame rate of the received content being greater than the first frame rate, adjust the received content to a second resolution, and to control the display panel to display a content of the second resolution at a second frame rate, the second frame rate being greater than the first frame rate.

CROSS-REFERENCE TO RELATED APPLICATION

This application is a continuation of U.S. application Ser. No.17/155,617, filed Jan. 22, 2021, which is based on and claims priorityunder 35 U.S.C. § 119 to Korean Patent Application No. 10-2020-0052860,filed on Apr. 29, 2020, in the Korean Intellectual Property Office. Thedisclosures of each of these documents are incorporated by referenceherein in their entireties.

BACKGROUND 1. Field

The disclosure relates to a display apparatus and a control methodthereof, and for example, to a display apparatus that image processescontent and displays the image processed content, and a control methodthereof.

2. Description of Related Art

With the development of image equipment, high quality content is beingproduced. In particular, recently, contents with a frame rate of 120 Hzor more have been produced.

When such content is played back, if an operating frequency of a displayapparatus is 120 Hz or more, the frame rate of the content may bedisplayed as is, but most conventional display apparatuses have anoperating frequency of 60 Hz or less.

For example, as illustrated in FIG. 1 , a display apparatus operating at60 Hz may display content with some frames of the content omitted toplayback the content of 120 Hz. In this case, there may be the problemof the content not being played back smoothly.

Upgrading a hardware specification of a display apparatus may be onemethod to resolving the problems described above. However, in order forthe display apparatus to playback content with a frame rate of 120 Hz ormore, there may be the problem of manufacturing costs rising.

For example, when one frame of a content with a frame rate of 120 Hz isdisplayed, the entire display area must be scanned for 1/120 seconds. Inaddition, the time for displaying one pixel line has become shorterbecause of the resolution of the display apparatus increasing. Forexample, in the case of a 8K resolution display apparatus, thehorizontal and vertical lengths of a pixel is 7680×4320, and becausescanning is carried out in a vertical direction, one pixel line may bescanned for 1/(120×4320)s in the above-described example.

If a 60 Hz content is displayed in a 4K resolution display apparatus,one pixel line may be scanned for 1/(60×2160)s. That is, it may benecessary to reduce a scanning time of one pixel line significantlyshort to playback a high quality content, and in this case, there may bethe problem of the manufacturing costs of the display apparatusincreasing excessively.

Accordingly, there is a need to develop a method for increasing aresponse characteristic of a content while reducing manufacturing costsof a display apparatus.

SUMMARY

Embodiments of the disclosure provide a display apparatus for improvinga response characteristic while maintaining a native resolution of thedisplay apparatus and a control method thereof.

According to an example embodiment, a display apparatus includes: adisplay panel configured to drive a frame of a first resolution at afirst frame rate, a communication interface comprising circuitryconfigured to receive content, and a processor configured to: based on aframe rate of the received content being greater than the first framerate, adjust the received content to a second resolution, and controlthe display panel to display the content of the second resolution at asecond frame rate, the second frame rate being greater than the firstframe rate.

The display panel may comprise a plurality of gate lines and a pluralityof data lines, and is configured to concurrently drive drives twoadjacent gate lines of the plurality of gate lines, wherein each of theplurality of data lines are configured to provide data to a pixel of asame column.

The processor may be configured to repeatedly display a one pixel lineof the content of the second resolution through two adjacent gate linesof the plurality of gate lines.

The display panel may display one frame for a first time correspondingto the first frame rate, and wherein the processor may be configured tocontrol the display panel to display one frame of a content of thesecond resolution for a second time, the second time being less than thefirst time and corresponding to the second frame rate.

The processor may be configured to adjust the received content to thesecond resolution based on an equal value of a vertical resolution ofthe display panel.

The processor may be configured to adjust a horizontal resolution of thecontent based on a horizontal resolution of the display panel, and toadjust a vertical resolution of the content based on an equal value of avertical resolution of the display panel.

The processor may be configured to identify an equal value of a verticalresolution of the display panel based on a frame rate of the content andthe first frame rate.

The first frame rate may be a maximum frame rate which the display panelis capable of outputting, and wherein the vertical resolution of thedisplay panel is a number of pixels arranged in a vertical direction ofa plurality of pixels of the display panel.

The processor may, based on the content being a first type, beconfigured to adjust the content to the second resolution, and based onthe content being a second type, to control the display panel to displaythe content at the first frame rate without adjusting the resolution ofthe content.

The processor may, based on a frame rate of the content being identicalwith the first frame rate, be configured to increase the frame rate ofthe content by performing frame interpolation on the content, and toadjust the content with the frame rate increased to the secondresolution.

The processor may, based on a user command increasing a frame rate beinginput, be configured to adjust the received content to the secondresolution.

According to an example embodiment, a method of controlling a displayapparatus includes: receiving content, adjusting the received content toa second resolution based on a frame rate of the received content beinggreater than a first frame rate of a display panel, and displayingcontent of the second resolution at a second frame rate, the secondframe rate being greater than a first frame rate, wherein the displaypanel is configured to drive a frame of a first resolution at the firstframe rate.

The display panel may comprise a plurality of gate lines and a pluralityof data lines, wherein the each of the plurality of data lines providedata to a pixel of a same column, and wherein the displaying maycomprise concurrently driving two adjacent gate lines of the pluralityof gate lines.

The displaying may comprise repeatedly displaying a one pixel line of acontent of the second resolution through two adjacent gate lines of theplurality of gate lines.

The display panel may display one frame for a first time correspondingto the first frame rate, and wherein the displaying may comprisedisplaying one frame of a content of the second resolution for a secondtime, the second time being less than the first time and correspondingto the second frame rate.

The adjusting may comprise adjusting the received content to the secondresolution based on an equal value of a vertical resolution of thedisplay panel.

The adjusting may comprise adjusting a horizontal resolution of thecontent based on a horizontal resolution of the display panel, andadjusting a vertical resolution of the content based on an equal valueof a vertical resolution of the display panel.

The method may further comprise identifying an equal value of a verticalresolution of the display panel based on a frame rate of the content andthe first frame rate.

The first frame rate may be a maximum frame rate which the display panelis capable of outputting, and wherein a vertical resolution of thedisplay panel is a number of pixels arranged in a vertical direction ofa plurality of pixels of the display panel.

The adjusting and displaying may comprise, based on the content being afirst type, adjusting the content to the second resolution anddisplaying at the second frame rate, and based on the content being asecond type, displaying the content at the first frame rate withoutadjusting the resolution of the content.

According to various example embodiments, the display apparatus may, byadjusting the resolution of the frame to reduce the time in which theframe is displayed, improve the response characteristic.

In addition, the display apparatus may be implemented at a low costbecause the display apparatus is capable of being operated at arelatively low operating frequency compared to the frame rate of thecontent.

With contents being produced at high resolution, the image qualityperceived by the user may not significantly deteriorate despite reducingthe vertical resolution of the content by half, and with the responsecharacteristic improved, a smoother image may be output.

BRIEF DESCRIPTION OF THE DRAWINGS

The above and other aspects, features and advantages of certainembodiments of the present disclosure will be more apparent from thefollowing detailed description, taken in conjunction with theaccompanying drawings, in which:

FIG. 1 is a diagram illustrating a problem of conventional technology;

FIG. 2A is a block diagram illustrating an example configuration of adisplay apparatus according to an embodiment of the disclosure;

FIG. 2B is a block diagram illustrating an example configuration of adisplay apparatus according to an embodiment of the disclosure;

FIG. 2C is a diagram illustrating an example configuration of a displaypanel according to an embodiment of the disclosure;

FIG. 3A is a diagram illustrating an example driving method of a displaypanel according to an embodiment of the disclosure;

FIG. 3B is a diagram illustrating an example driving method of a displaypanel according to an embodiment of the disclosure;

FIG. 3C is a diagram illustrating an example driving method of a displaypanel according to an embodiment of the disclosure;

FIG. 3D is a diagram illustrating an example driving method of a displaypanel according to an embodiment of the disclosure;

FIG. 3E is a diagram illustrating an example driving method of a displaypanel according to an embodiment of the disclosure;

FIG. 4A is a diagram illustrating an example operation of displayingcontent according to an embodiment of the disclosure;

FIG. 4B is a diagram illustrating an example operation of displayingcontent according to an embodiment of the disclosure;

FIG. 4C is a diagram illustrating an example operation of displayingcontent according to an embodiment of the disclosure;

FIG. 5A is a diagram illustrating an example method of adjusting aresolution according to an embodiment of the disclosure;

FIG. 5B is a diagram illustrating an example method of adjusting aresolution according to an embodiment of the disclosure;

FIG. 6A is a diagram illustrating an example configuration of aprocessor according to an embodiment of the disclosure;

FIG. 6B is a diagram illustrating an example configuration of aprocessor according to an embodiment of the disclosure;

FIG. 6C is a diagram illustrating an example configuration of aprocessor according to an embodiment of the disclosure;

FIG. 7 is a diagram illustrating an example method of outputting contentat various frame rates according to an embodiment of the disclosure; and

FIG. 8 is a flowchart illustrating an example method of controlling adisplay apparatus according to an embodiment of the disclosure.

DETAILED DESCRIPTION

The example embodiments of the disclosure may be diversely modified.Accordingly, various example embodiments are illustrated in the drawingsand are described in greater detail. However, it is to be understoodthat the disclosure is not limited to a specific example embodiment, butincludes all modifications, equivalents, and substitutions withoutdeparting from the scope and spirit of the present disclosure. Also,well-known functions or constructions may not described in detail wherethey would obscure the disclosure with unnecessary detail.

Hereinafter, the disclosure will be described in greater detail withreference to the accompanying drawings.

The terms used in describing the embodiments of the disclosure aregeneral terms selected that are currently widely used considering theirfunction herein. However, the terms may change depending on intention,legal or technical interpretation, emergence of new technologies, andthe like of those skilled in the related art. Further, in certain cases,there may be terms arbitrarily selected, and this case, the meaning ofthe term will be disclosed in greater detail in the correspondingdescription. Accordingly, the terms used herein are not to be understoodsimply as its designation but based on the meaning of the term and theoverall context of the disclosure.

Expressions such as “comprise”, “may comprise”, “consist”, or “mayconsist of” used herein are to be understood as designating a presenceof a corresponding characteristic (e.g., elements such as a number, afunction, an operation, and a component), and do not exclude thepresence of an additional characteristic.

The expression at least one of A and/or B should be understood torepresent “A” or “B” or any one of “A and B”.

Expressions such as “first”, “second”, and so on used herein may be usedto refer to various elements regardless of order and/or importance.Further, it should be noted that the expressions are merely used todistinguish an element from another element and not to limit thecorresponding elements.

A singular expression includes a plural expression, unless otherwisespecified. It is to be understood that the terms such as “comprise” or“consist of” are used herein to designate a presence of acharacteristic, a number, a step, an operation, an element, a component,or a combination thereof, and not to preclude a presence or apossibility of adding one or more of other characteristics, numbers,steps, operations, elements, components or a combination thereof.

In this disclosure, the term “user” may refer to a person using adisplay apparatus or an apparatus (e.g., an artificial intelligenceelectronic apparatus) using a display apparatus.

Example embodiments of the disclosure will be described in greaterdetail below with reference to the drawings.

FIG. 2A is a block diagram illustrating an example configuration of adisplay apparatus 100 according to an embodiment of the disclosure.

The display apparatus 100, as an apparatus that displays content, maybe, for example, and without limitation, a television (TV), a desktoppersonal computer (PC), a notebook, a video wall, a large format display(LFD), a digital signage, a digital information display (DID), aprojector display, a digital video disk (DVD) player, a refrigerator, asmartphone, a tablet PC, a monitor, smart glasses, a smart watch, andthe like, and may be any apparatus so long as the apparatus is capableof displaying content.

Referring to FIG. 2A, the display apparatus 100 may include a displaypanel 110, a processor (e.g., including processing circuitry) 120, and acommunication interface (e.g., including communication circuitry) 130.However, the embodiment is not limited thereto, and the displayapparatus 100 may be implemented in a form with some configurationsexcluded, and other configurations further included.

The display panel 110 may include a plurality of pixels, and may displayimage signals. For example, the display panel 110 may, if implemented in8K resolution, may include a plurality of pixels of 7680×4320. Thedisplay panel may, if implemented to 4K resolution, include a pluralityof pixels of 3840×2160. However, the embodiment is not limited thereto,and the display panel may be realized in various resolutions.

The each of the plurality of pixels included in the display panel 110may be comprised of sub pixels representing, for example, and withoutlimitation, red (R), green (G), and blue (B). In another example, thepixel may also include sub pixels representing white (W) in addition tothe RGB. However, the embodiment is not limited thereto, and the each ofthe plurality of pixels may be realized in various forms.

The display panel 110 may include a plurality of gate lines and aplurality of data lines. The gate line may refer, for example, to a linethat transfers a scanning signal or a gate signal, and the data line mayrefer, for example, to a line that transfers data voltage. For example,each of a plurality of sub pixels included in the display panel 110 maybe connected to one gate line and one data line. For example, each of aplurality of data lines may provide data to a pixel of a same column. Inother words, the display panel 110 may be a panel of a 1D1G stripestructure.

The display panel 110 may sequentially drive the plurality of gatelines, or may concurrently drive some of the plurality of gate lines.For example, the display panel 110 may concurrently drive two adjacentgate lines of the plurality of gate lines. The display panel 110 may beany panel so long as it is a panel with a driving structure capable ofconcurrently driving the plurality of gate lines.

The display panel 110 may drive a frame of a first resolution at a firstframe rate. The first frame rate may, for example, be a maximum framerate capable of being output by the display panel 110. For convenienceof description, an operating frequency and a first frame rate of thedisplay panel 110 will be used interchangeably in the disclosure and aredescribed below.

The display panel 110 may be implemented to display one frame during afirst time corresponding to a first frame rate. For example, the displaypanel 110 may display one frame during 1/60s. If the display panel 110is a 60 Hz panel of 7680×4320 resolution, the display panel 110 maydisplay one frame with 7680×4320 resolution for 1/60s on a display panelcomprised of 7680×4320 pixels, and if the display panel 110 is a 60 Hzpanel of 3840×2160 resolution, the display panel 110 may display oneframe with 3840×2160 resolution for 1/60s on a display panel comprisedof 3840×2160 pixels.

The first time may, for example, be time spent until all of theplurality of gate lines included in the display 110 are drivensequentially. For example, if the display panel is a 60 Hz panel of7680×4320 resolution, the display panel 110 may, through a method ofdriving a gate line corresponding to 7680 pixels included in a firstrow, and sequentially driving a gate line corresponding to 7680 pixelsincluded in a second row, perform driving until a gate linecorresponding to 7680 pixels included in a four thousand three hundredand twentieth (4320th) row. Through this operation, one frame may bedisplayed, and the time for displaying one frame may refer to the timespent until all gate lines included from the first row to the 4320th roware driven.

However, the embodiment is not limited thereto, and the processor 120may be configured to control the display panel 110 to drive until thegate line corresponding to 7680 pixels included in the 4320th row isdriven through the method of driving the pixels included in the firstrow and then driving the pixels included in an arbitrary row that is notthe second row. For example, a scan direction of the display panel 110may be implemented to an arbitrarily changed form that is not from anupper side to a lower side direction of the display panel.

In the above, the display panel 110 has been described as displaying oneframe for 1/60s, but the embodiment is not limited thereto, and the timespent for the display panel 110 to display one frame may vary based thetype of the display 110.

The display panel 110 may be implemented as various types such as, forexample, and without limitation, a liquid crystal display (LCD), anorganic light emitting diode (OLED) display, a plasma display panel(PDP), a micro LED, a laser display, VR, glass, or the like. In thedisplay, a driving circuit, a backlight unit, and the like, which may beimplemented in the form of an a-si thin film transistor (TFT), a lowtemperature poly silicon (LTPS) TFT, an organic TFT (OTFT), and thelike, may also be included. The display panel 110 may also beimplemented as a touch screen coupled with a touch sensor, a flexibledisplay, a three dimensional display (3D display), or the like.

The processor 120 may include various processing circuitry and controlthe overall operations of the display apparatus 100. For example, theprocessor 120 may control the overall operations of the displayapparatus by being connected to each configuration of the displayapparatus 100. For example, the processor 120 may be configured tocontrol an operation of the display apparatus 100 by being connected toconfigurations such as, for example, and without limitation, a displaypanel 110, a communication interface 130, and a memory (not shown) andthe like. In addition, the processor 120 may include various processingcircuitry, such as, for example, and without limitation, an imageprocessor (e.g., scaler; not shown) and a timing controller (TCON; notshown), or the like, but the configurations may be implemented asseparate configurations, and the processor 120 may be configured tocontrol an operation of the display apparatus 100 by being connectedwith configurations such as, for example, and without limitation, theimage processor, the TCON, and the like.

According to an embodiment, the processor 120 may be implemented, forexample, and without limitation, as a digital signal processor (DSP), amicroprocessor, a time controller (TCON), or the like. However, theembodiment is not limited thereto, and the processor 120 may include,for example, and without limitation, one or more of a central processingunit (CPU), a micro controller unit (MCU), a micro processing unit(MPU), a controller, an application processor (AP), a communicationprocessor (CP), an ARM processor, or the like, or may be defined by thecorresponding term. In addition, the processor 120 may be implemented asa System on Chip (SOC) or a large scale integration (LSI) embedded witha processing algorithm, and as a form of a field programmable gate array(FPGA).

The processor 120 may be configured to, based on a frame rate of acontent received through the communication interface 130 being greaterthan the first frame rate of the display apparatus 110, adjust thereceived content to a second resolution, and control the display 110 forthe content of the second resolution to be displayed at a second framerate, which is greater than a first frame rate.

The processor 120 may be configured to control the display panel 110 forthe one frame included in the content of the second resolution to bedisplayed for a second time, which is less than a first time andcorresponds to the second frame rate.

The operation may be possible as the processor 120 repeatedly displaysone pixel line included in the content of the second resolution throughtwo adjacent gate lines of the plurality of gate lines.

To describe the above operation, first, a resolution adjustmentoperation of a processor 120 will be described.

The processor 120 may adjust the content to the second resolution basedon an equal value of a vertical resolution. For example, the processor120 may, based on the display panel 110 being a panel of 7680×4320resolution, adjust the resolution of the content based on the equalvalue of the vertical resolution of 4320.

An equal part may refer, for example, to dividing to equal size, and theequal value may refer, for example, to a size of each object based onthe equal part. For example, a bisect value of 4320 may be 2160, and aquadrisect value may be 1080. Further, the vertical resolution of thedisplay panel 110 may refer, for example, to the number of pixelsarranged in a vertical direction of the plurality of pixels included inthe display panel 110.

The processor 120 may adjust a horizontal resolution of the contentbased on a horizontal resolution of the display panel 110, and adjustthe vertical resolution of the content based on the equal value of thevertical resolution. For example, the processor 120 may be configuredto, based on the display 110 being a panel of 7680×4320 resolution,adjust the horizontal resolution of the content based on a horizontalresolution of 7680, and adjust the vertical resolution of the contentbased on the equal value, for example the bisect value of 2160, of thevertical resolution of 4320.

For example, the processor 120 may, based on the display panel 110 beinga panel of 7680×4320 resolution and the resolution of the content being7680×4320, adjust the vertical resolution of the content and adjust theresolution of the content to 7680×2160. The processor 120 may, based onthe display panel 110 being a panel of 7680×4320 resolution and theresolution of the content being 3840×2160, adjust the horizontalresolution of the content and adjust the resolution of the content to7680×2160. For example, the processor 120 may adjust at least one of thehorizontal resolution or vertical resolution of the content based on theequal value of the horizontal resolution and the vertical resolution ofthe display panel 110. The adjustment of resolution may be performed,for example, by up scaling or down scaling.

The processor 120 may be configured to control the display panel 110 forone frame included in the content to which the resolution is adjusted tobe displayed for a second time, which is less than a first time. Thefirst time may be the time spent until all of the plurality of gatelines included in the display panel 110 are driven sequentially.

To describe a method of reducing time for the first frame to bedisplayed, an example of using a bisect value of the vertical resolutionof the display panel 110 will be described.

The processor 120 may adjust the resolution of the content based on thebisect value of the vertical resolution of the display panel 110. Forexample, based on the resolution of the display panel 110 being7680×4320 and the resolution of the content being 7680×4320, theprocessor 120 may adjust the resolution of the content to 7680×2160based on a bisect value of 2160 of the vertical resolution of thedisplay panel 110.

The processor 120 may be configured to, based on concurrently drivingtwo adjacent gate lines of the plurality of gate lines included in thedisplay panel 110, control the display panel 110 for a one frame to bedisplayed for a second time. For example, the processor 120 may displayone pixel line included in a frame to which the vertical resolution isadjusted by driving two adjacent gate lines of the plurality of gatelines.

In the above-described example, the display panel 110 may include a gateline of 4320, the vertical resolution of the content to be displayed maybe 2160, and the processor 120 may display a first pixel line of thecontent by driving the upper two gate lines of the display panel 110.The processor 120 may then drive the two gate lines directly under todisplay a second pixel line. Through this method, the processor 120 maysequentially display all pixel lines of the content.

In the case of conventional technology, the plurality of gate linesrequires being driven 4320 times sequentially or based on a time dividedby 4320 times to display one frame. However, in the case of thedisclosure, because the two adjacent gate lines are concurrently driven,the plurality of gate lines are driven 2160 times sequentially or basedon a time divided by 2160 times, and the time in which one frame isdisplayed may be reduced by half. That is, the time in which one frameis displayed may be reduced by lowering the vertical resolution of thecontent. Because the vertical resolution of the content is sufficientlya high resolution despite being lowered to 2160, there may be virtuallyno degradation in image quality. In other words, a viewer may notgreatly notice the degradation in image quality.

In the above, the bisect value of the vertical resolution being used hasbeen described, but this is merely an example embodiment. The equalvalue may be vary throughout. In addition, the resolution of the contentmay be adjusted based on a resolution lower than the vertical resolutionof the display panel 110 and not the equal value of the verticalresolution of the display panel 110. For example, based on the displaypanel 110 including a gate line of 4320, the processor 120 may adjustthe vertical resolution of the content to 617, and may concurrentlydrive seven continued gate lines. One gate line may remain, and theviewer may hardly recognize the one gate line remaining because of thevery small pixels, despite not driving the remaining gate line.

The processor 120 may be configured to, based on the frame rate of thecontent being greater than the operating frequency of the display panel110, adjust the resolution of the content based on the equal value ofthe vertical resolution, and control the display panel 110 for the oneframe included in the content to which the resolution is adjusted to bedisplayed for a second time, which is less than a first time.

For example, if the display panel 110 is a 50 Hz panel and the framerate of the content is 100 Hz or if the display panel is a 60 Hz paneland the frame rate of the content is 120 Hz, the processor 120 may beconfigured to adjust the resolution of the content based on the equalvalue of the vertical solution of the display panel 110, and control thedisplay panel 110 for the one frame included in the content to which theresolution is adjusted to be displayed for a second time, which is lessthan a first time.

The processor 120 may identify the frame rate of the content and theequal value of the vertical resolution of the display panel 110 based onthe first frame rate. For example, if the frame rate of the content is120 Hz and the display panel 110 is a 60 Hz panel, the processor 120 maybisect the vertical resolution of the display panel 110. Alternatively,if the frame rate of the content is 240 Hz and the display 110 panel isa 60 Hz panel, the processor 120 may quadrisect the vertical resolutionof the display panel 110. That is, the processor 120 may, based on acontent of a resolution identical to the resolution of the display panel110 being input, perform down scaling on the vertical resolution of thecontent to correspond to the bisect value or the quadrisect value of thevertical resolution of the display panel 110 based on the frame rate ofthe content and the operating frequency of the display panel 110.

The processor 120 may, by controlling the display panel 110 for aplurality of frames included in a content to which resolution isadjusted to be displayed for a first time, output content to correspondto the frame rate of the content. For example, if the frame rate of thecontent is 120 Hz and the display panel 110 is a 60 Hz panel, aconventional display apparatus would omit a part of the frames of thecontent and display one frame included in the content for a first time,that is, for 1/60s. On the other hand, the processor 120 of thedisclosure may adjust the resolution of the content based on the bisectvalue of the vertical resolution of the display panel 110 and controlthe display panel 110 for the one frame included in the content to whichresolution is adjusted to be displayed for a second time, for example,for 1/120s. The processor 120 may display two frames included in thecontent for a first time, that is, for 1/60s, and this may refer, forexample, to content being displayed to correspond to the frame of thecontent.

The processor 120 may be configured to adjust the content to a secondresolution if the content is a first type, and control the display panel110 to be displayed at a first frame rate without adjusting theresolution of the content if the content is a second type.

The processor 120 may, based on the frame rate of the content beinggreater than the operating frequency of the display panel 110 and thetype of content being a first type, adjust the resolution of the contentand control the display panel 110 for the one frame to be displayed fora second time, and based on the frame rate of the content being greaterthan the operating frequency of the display panel 110 and the type ofcontent being a second type, control the display panel 110 for only apart of the plurality of frames included in the content to be displayedbased on the operating frequency of the display panel 110.

For example, the processor 120 may, based on the frame rate of thecontent being greater than the operating frequency of the display panel110 and the type of the content being a game content, adjust theresolution of the content and control the display panel 110 for the oneframe to be displayed for a second time, and based on the frame rate ofthe content being greater than the operating frequency of the displaypanel 110 and the type of the content being another content such as amoving image that is not a game, control the display panel 110 for onlya part of the plurality of frames included in the content to bedisplayed based on the operating frequency of the display panel 110.

However, the embodiment is not limited thereto, and a playback method ofa content may be determined based on a user command regardless of thetype of content. For example, the processor 120 may adjust the receivedcontent to a second resolution based on a user command for increasingthe frame rate being input. The processor 120 may, based on a usercommand for reducing a response rate or changing to the original modebeing input, display the content at a first frame rat without adjustingthe resolution of the content. The processor 120 may be configured tocontrol the display panel 110 for only a part of the plurality of framesincluded in the content to be displayed based on the first frame rate.

According to an embodiment, the user command described above may beprovided to the user in a form of a specialized menu such as, forexample, and without limitation, a game mode, sports mode, and the like.

The processor 120 may also identify a playback method of the contentbased on whether an up scaling of the received content is performed.

The content may, for example, be a content to which up scaling isperformed before being stored in the display apparatus 100. For example,an original content may be up scaled to a 3840×2160 resolution or a7680×4320 resolution by a server or the like, and the display apparatus100 may receive and store content to which up scaling to a 7680×4320resolution is performed.

The processor 120 may adjust the vertical resolution of the up scaledcontent based on the frame rate of the up scaled content, and controlthe display panel 110 for the one frame included in the content to whichthe vertical resolution is adjusted to be displayed for a second time,which is less than a first time.

For example, the display panel 110 may be a 60 Hz panel of 7680×4320resolution and the frame rate of the content to which up scaling isperformed to 7680×4320 resolution may be 120 Hz, and the processor 120may be configured to, by adjusting the resolution of the up scaledcontent to 7680×2160 and concurrently driving two adjacent gate lines ofthe plurality of gate lines, control the display panel 110 for the oneframe included in the content to be displayed for a second time.

The display panel 110 may be a 120 Hz panel of 7680×4320 resolution andthe frame rate of the content to which up scaling is performed to7680×4320 resolution may be 240 Hz, and the processor 120 may beconfigured to, by adjusting the resolution of the up scaled content to7680×2160 and concurrently driving one or two adjacent gate lines of theplurality of gate lines, control the display panel 110 for the one frameincluded in the content to be displayed for a second time.

As described above, when using the up scaled content, degradation ofimage quality may not occur because the up scaled content corresponds tothe vertical resolution of the original content despite adjusting thevertical resolution of the content.

The processor 120 may identify whether adjustment of resolution of thecontent is performed and a driving method of the plurality of gate linesbased on at least one of an additional information or an image analysisof the content.

For example, the processor 120 may be configured to, if the content isidentified as an up scaled content based on at least one of theadditional information or image analysis of the content, adjust theresolution of the content based on the frame rate of the content and theoperating frequency of the display panel 110, and control the displaypanel 110 for the one frame included in the content to which theresolution is adjusted to be displayed for a second time, which is lessthan a first time.

The processor 120 may be configured so that the vertical resolution ofthe content may maintain a greater state than the vertical resolution ofthe original content.

For example, the original content may be a resolution of 3840×2160, theup scaled content may be a resolution of 7680×4320, the frame rate ofthe original content and the up scaled content may be 240 Hz, and thedisplay panel 110 may be a 60 Hz panel of 7680×4320 resolution. In thisexample, if the processor adjusts the resolution of the up scaledcontent to 7680×1080, because the adjusted resolution may be lower thanthe vertical resolution of the original content, the resolution of theup scaled content may be adjusted to 7680×2160. Because the verticalresolution of the up scaled content is bisected, the processor 120 mayconcurrently drive two adjacent gate lines of the plurality of gatelines, and display the one frame for 1/120s. However, because the framerate is 240 Hz, the processor 120 may not display some frames in thecontent to which resolution is adjusted to correspond to the operatingfrequency of the display panel 110.

Through this operation, the response characteristic may be improvedwithout degrading the image quality of the content.

However, the embodiment is not limited thereto, and the method ofadjusting the resolution described above and the method of notdisplaying some frames may be negotiated to various forms.

In the above, the frame rate of the content being greater than the firstframe rate has been described, but the embodiment is not limitedthereto, and the processor 120 may, based on the frame rate of thecontent being identical with the first frame rate, increase the framerate of the content by performing frame interpolation on the content,and adjust the content with the increased frame rate to a secondresolution.

The processor 120 may image process content received through thecommunication interface 130 and display the image processed contentthrough the display panel 110. The processor 120 may also image processcontent being streamed through the communication interface 130 anddisplay the image processed content through the display panel 110.

The communication interface 130 may include various communicationcircuitry and be configured to perform communication with externalapparatuses of various types according to the communication methods ofvarious types. The communication interface 130 may include, for example,and without limitation, a Wi-Fi module, a Bluetooth module, an infraredcommunication module, a wireless communication module, and the like. Therespective communication module may be implemented in at least onehardware chip type.

The processor 120 may use the communication interface 130 to performcommunication with the various external apparatuses. The externalapparatus may include, for example, and without limitation, a server, aBluetooth earphone, a display apparatus, and the like.

The Wi-Fi module and the Bluetooth module may perform communicationusing a Wi-Fi method and a Bluetooth method, respectively. When usingthe Wi-Fi module or the Bluetooth module, various connection informationsuch as a service set identifier (SSID) and a session key may betransmitted and received first, and after performing communicationconnection using thereof, various information may be transmitted andreceived.

The infrared ray communication module may perform communicationaccording to infrared data association (IrDA) technology that transmitsdata wirelessly at a close range using an infrared ray which is betweenvisible rays and millimeter waves.

The wireless communication module may include at least one communicationchip performing communication according to various communicationstandards such as ZigBee, 3^(rd) generation (3G), 3^(rd) generationpartnership project (3GPP), long term evolution (LTE), LTE advanced(LTE-A), 4^(th) generation (4G), 5^(th) generation (5G), or the like, inaddition to the communication methods described above.

Other communication interfaces 130 may include, for example, and withoutlimitation, at least one of a wired communication module performingcommunication using a local area network (LAN) module, an Ethernetmodule, a pair cable, a coaxial cable, an optical cable, or the like.

The communication interface 130 may further include an input and outputinterface. The input and output interface may be any one interface of ahigh-definition multimedia interface (HDMI), a mobile high-definitionlink (MHL), a universal serial bus (USB), a display port (DP), aThunderbolt, a video graphics array (VGA) port, an RGB port, aD-subminiature (D-SUB), or a digital visual interface (DVI).

The input and output interface may input or output at least one of anaudio signal and a video signal.

According to an embodiment, the input and output interface may include aport for inputting and outputting only an audio signal and a separateport for inputting and outputting only a video signal, or may beimplemented to one port for inputting and outputting both the audiosignal and the video signal.

In FIG. 2A, the processor 120 has been described as adjusting theresolution of the content, and controlling the plurality of gate linesincluded in the display apparatus 110. In FIG. 2A, although theprocessor 120 has been described as including a scaler for adjusting theresolution of the content and a time controller (TCON) for controllingthe plurality of gate lines included in the display panel 110, theembodiment is not limited thereto, and other embodiments will bedescribed below.

FIG. 2B is a block diagram illustrating an example configuration of adisplay apparatus 100 according to an embodiment of the disclosure.

Referring to FIG. 2B, the display apparatus 100 may further include, notonly a display panel 110, a processor (e.g., including processingcircuitry) 120, and a communication interface (e.g., includingcommunication circuitry) 130, but also a memory 140, a user interface(e.g., including user interface circuitry) 150, an image processor(e.g., including image processing circuitry) 160 (e.g., scaler), and atiming controller (TCON) 170. The description on the configuration whichoverlaps with that of FIG. 2A in the configuration of FIG. 2B may not berepeated here.

The memory 140 may store content. The processor 120 may perform imageprocessing on the content stored in the memory 140 and display throughthe display panel 110. In addition, the memory 140 may store informationfor displaying other content.

The memory 140 may be implemented as a non-volatile memory and/or avolatile memory, but is not limited thereto. For example, a hard diskmay be used in place of the memory, and any configuration may bepossible if the configuration is capable of storing data.

The user interface 150 may include various user interface circuitry andreceive various user interaction. The user interface 150 may beimplementable to various forms based on the embodiment of the displayapparatus 100. For example, the user interface 150 may include a buttonprovided on a display apparatus 100, a microphone for receiving uservoice, a camera for detecting user motion, and the like. If the displayapparatus 100 is implemented to a touch-based terminal apparatus, theuser interface 150 may be implemented as a touch screen form comprisingan inter-layer structure with a touch pad. The user interface 150 may beone configuration of the above-described display panel 110.

The image processor 160 may include various image processing circuitryand adjust the resolution of the content through the control of theprocessor 120. For example, the image processor 160 may perform upscaling or down scaling on the content through the control of theprocessor 120. The image processor 160 may change the resolution ratioof the content. For example, the image processor 160 may adjust thecontent with the resolution of 16:10 to a content of 16:5.

The timing controller 170 may include various timing control circuitryand receive input of an input signal (IS), a horizontal synchronizationsignal (Hsync), a vertical synchronization signal (Vsync), a main clocksignal (MCLK), and the like from an external configuration, for example,the processor 120, and generate an image data signal, a scanning controlsignal, a data control signal, an emission control signal and the liketo provide to the display panel 110.

The communication interface 130, the memory 140, the user interface 150,the image processor 160, and the timing controller 170 may beimplemented as one configuration or only some configurations may beimplemented as one configuration. In addition, at least one of thecommunication interface 130, the memory 140, the user interface 150, theimage processor 160, or the timing controller 170 may be implemented inan integrated form with the display panel 110.

Unlike FIGS. 2A and 2B, the display apparatus 100 may also be simplyimplemented in the form of the display panel 110 including the timecontroller 170.

FIG. 2C is a diagram illustrating an example configuration of a displaypanel 110 according to an embodiment of the disclosure.

The display panel 110 may be formed so that the gate lines (GL1 to GLn)and the data lines (DL1 to DLm) intersect with each other, and R, G, Bsub pixels (e.g., PR, PG and PB) may be formed at an area provided bythe intersecting thereof. The adjacent R, G, B sub pixels (e.g., PR, PGand PB) may form one pixel. In other words, each pixel may reproduce acolor of a subject in three primary colors of a red color (R), a greencolor (G), and a blue color (B) by including an R sub pixel (PR)representing the red color (R), a G sub pixel (PG) representing thegreen color (G), and a B sub pixel (PB) representing the blue color (B).

If the display panel 110 is implemented as an LCD panel, each sub pixel(e.g., PR, PG and PB) may include a pixel electrode and a commonelectrode, and light transmissivity may change as a liquid crystalarrangement is changed by an electric field formed by a potentialdifference between both electrodes. The TFTs formed at the intersectionsof the gate lines (GL1 to GLn) and the data lines (DL1 to DLm) mayprovide video data, that is, red color (R), the green color (G), and theblue color (B) data, from the data lines (DL1 to DLm) to the pixelelectrode of each sub pixel (e.g., PR, PG and PB) in response to a scanpulse from each gate line (GL1 to GLn).

The display panel 110 may further include a backlight unit 111, abacklight driver 112, and a panel driver 113.

The backlight driver 112 may be implemented in a form including a driverintegrated circuit (IC) for driving the backlight unit 111. According toan embodiment, the driver IC may be implemented as a hardware separatefrom the processor 120. For example, if the light sources included inthe backlight unit 111 are implemented as an LED device, the driver ICmay be implemented as at least one LED driver which controls the currentapplied to the LED device. According to an embodiment, the LED drivermay be disposed at a rear end of a power supply (e.g., a switching modepower supply (SMPS)) and receive voltage applied from the power supply.However, according to another embodiment, voltage may be received from aseparate power supply. Implementing the SMPS and the LED driver in theform of an integrated module may also be possible.

The panel driver 113 may be implemented in a form including a driver ICfor driving the display panel 110. According to an embodiment, thedriver IC may be implemented as a hardware separate from the processor120. For example, the panel driver 113 may include a data driver 113-1which provides video data to the data lines and a gate driver 113-2which provides a scan pulse to the gate lines.

The data driver 113-1 may, as a method of generating a data signal,receive image data of R/G/B components from the processor 120 or thetime controller 170 and generate a data signal. In addition, the datadriver 113-1 may be connected to the data line (DL1, DL2, DL3, . . . ,and DLm) of the display panel 110 and apply the generated data signal tothe display panel 110.

The gate driver 113-2 (or, scan driver) may, to generate a gate signal(or, scan signal), be connected to the gate line (GL1, GL2, GL3, . . . ,GLn) and transfer a gate signal to a specific row of the display panel110. In the pixel to which the gate signal is transferred, a data signaloutput from the data driver 113-1 may be transferred.

The processor 120 may control the gate driver 113-2 and concurrentlydrive at least two gate lines. For example, the processor 120 maytransfer a signal to at least one of the data driver 113-1 or the gatedriver 113-2 and control the display panel 110. Through this operation,the display time of the frame is reduced, and content may be displayedat a frame rate higher than the operating frequency of the display panel110.

The operation of the processor 120 will be described in greater detailbelow through the various drawings. The respective embodiments in thedrawings below may be implemented individually or in combinationthereof.

FIGS. 3A. 3B, 3C, 3D and 3E are diagrams illustrating example drivingmethods of a display panel 110 according to an embodiment of thedisclosure.

The display panel 110 may be implemented as a panel of x×y resolution.For example, the display panel 110 may be implemented as a panel of7680×4320 resolution. The display panel 110 may also be implemented as apanel of 3840×2160 resolution. However, this is merely an exampleembodiment, and the display apparatus 110 may be realized in variousother resolutions. In addition, a ratio of the horizontal length andvertical length of the display panel 110 may also be varied such as21:9, 32:9, and the like.

FIG. 3A illustrates a display panel 110 implemented as a panel of x×yresolution, and for convenience of description, only the verticalresolution is displayed in a divided state. For example, the displaypanel 110 implemented to a panel of x×y resolution may be divided into ahorizontally long area by a number of y.

The horizontally long area by the number of y may be driven through agate line. For example, the display panel 110 may include a gate line ofthe number of y.

According to an embodiment, FIG. 3B is a diagram illustrating anoperating frequency of a display panel 110 according to an embodiment ofthe disclosure. In FIG. 3B, the display panel 110 may be a 60 Hz panel.

As illustrated in FIG. 3B, the display panel 110 may display 60 framesin 1 second. For example, the display panel 110 may display 1 frame for1/60s.

The display panel 110 may sequentially drive gate lines of y number todisplay 1 frame for 1/60s. If one gate line is driven at one time, theunit time for one gate line being driven may be 1/(60×y)s, and if allgate lines are driven, because of being repeated by y number of times, atime of 1/60s may be spent.

According to an embodiment, if two gate lines are concurrently driven,the unit time may be 1/(60×y)s, but because the number of times repeatedfor driving all gate lines is y/2 times, a time of 1/120s may be spent.

In addition, when two gate lines are concurrently driven, pixelsadjacent in a vertical direction may display the same color with oneanother. For example, for the pixels adjacent in the vertical directionto display the same color with one another, the display panel 110 may beimplemented as a panel of a 1D1G stripe structure as illustrated in FIG.3C. A gate terminal of the pixels adjacent in the vertical direction maybe concurrently turned-on, and the two pixels adjacent in the verticaldirection may display the same color because the same data value isinput.

On the other hand, in the case of a panel of a 1D1G crossed structure inFIG. 3D or a panel of 2DHG structure in FIG. 3E, even when the firstgate line and the second gate line are concurrently driven, because thedata value input to the pixels adjacent in the vertical direction isdifferent, the two pixels adjacent in the vertical direction may displaydifferent colors, and the disclosure may not be applied. However, evenin the case of a panel of 1D1G crossed structure or a panel of 2DHGstructure, if it is a technique capable of displaying the same color byconcurrently driving pixels adjacent in the vertical direction, thedisclosure may be applied.

FIGS. 4A, 4B and 4C are diagrams illustrating an example operation ofdisplaying content according to an embodiment of the disclosure. InFIGS. 4A, 4B and 4C, the display panel 110 may be a 60 Hz panel, and theframe rate of the content may be 120 Hz.

The processor 120 may adjust the resolution of the content based on theequal value of the vertical resolution of the display panel 110. Forexample, as illustrated in FIG. 4A, the processor 120 may, based on thedisplay panel 110 being a panel of 7680×4320 resolution, adjust theresolution of the content to 7680×2160.

The processor 120 may concurrently drive the two adjacent gate lines ofthe plurality of gate lines included in the display panel 110. Forexample, as illustrated in FIG. 4B, the processor 120 may display apixel line of a first row of the content to which resolution is adjustedto 7680×2160 by driving the upper end two adjacent gate lines 410. Theprocessor 120 may then display a pixel line of a second row of thecontent to which resolution is adjusted to 7680×2160 by driving the nextupper end two adjacent gate lines 420.

Through this method, the processor 120 may reduce the time fordisplaying one frame by half. For example, the processor 120 may, basedon not performing the operation as in FIGS. 4A and 4B, display one framefor 1/60s as illustrated on the upper end of FIG. 4C. On the other hand,the processor may, based on performing the operation as in FIGS. 4A and4B, display one frame for 1/120s as illustrated on the lower end of FIG.4C. That is, the processor 120 may display two frames for 1/60s.

The processor 120 may, in the case of the upper end of FIG. 4C, display60 frames for 1 second, but in the case of the lower end of FIG. 4C,display 120 frames for 1 second. For example, the processor 120 may,while maintaining the driving speed of the gate line of the displaypanel 110 as is, reduce the time in which one frame is displayed throughthe lowering of vertical resolution and provide an effect of appearingas if the frame rate is increased.

FIGS. 5A and 5B are diagrams illustrating an example method of adjustinga resolution according to an embodiment of the disclosure. In FIGS. 5Aand 5B, the display panel 110 may be a A Hz panel of a x×y resolution.

The processor 120 may adjust at least one of the horizontal resolutionor the vertical resolution of the content based on the equal value ofthe horizontal resolution and the vertical resolution of the displaypanel 110.

For example, the processor 120 may, as illustrated in FIG. 5A, adjustthe resolution of the content to x×y/2 if the resolution of the contentis x×y and the frame rate is 2 A Hz. The processor 120 may, asillustrated in FIG. 5B, adjust the resolution of the content to x×y/2 ifthe resolution of the content is x/2×y/2 and the frame rate is 2 A Hz.

If the display panel 110 is a 60 Hz panel of 7680×4320 resolution, theresolution of the content is 7680×4320 and the frame rate is 120 Hz, theprocessor 120 may adjust the resolution of the content to 7680×2160. Ifthe display panel 110 is a 60 Hz panel of 7680×4320 resolution, theresolution of the content is 3840×2160 and the frame rate is 120 Hz, theprocessor may adjust the resolution of the content to 7680×2160.

The processor 120 may, if the resolution of the content is x×y and theframe rate is 4 A Hz, adjust the resolution of the content to x×y/4. Forexample, if the display panel is a 60 Hz panel of 7680×4320 resolution,the resolution of the content is 7680×4320 and the frame rate is 240 Hz,the processor 120 may adjust the resolution of the content to 7680×1080.That is, based on the frame rate of the content and the operatingfrequency of the display panel 110, a scaling ratio of the content maybe varied.

The processor 120 may, if the resolution of the content is x/4×y/4 andthe frame rate is 2 A Hz, adjust the resolution of the content to x×y/2.For example, if the display panel 110 is a 60 Hz panel of 7680×4320resolution, the resolution of the content is 1920×1080 and the framerate is 120 Hz, the processor 120 may adjust the resolution of thecontent to 7680×2160.

The processor 120 may, if the resolution of the content is 2x×2y and theframe rate is 2 A Hz, adjust the resolution of the content to x×y/2.

For example, the processor 120 may adjust the horizontal resolution ofthe content to correspond to the horizontal resolution of the displaypanel 110, and adjust the vertical resolution of the content tocorrespond to the equal value of the vertical resolution of the displaypanel 110.

FIGS. 6A, 6B and 6C are diagrams illustrating an example configurationof a processor 120 according to an embodiment of the disclosure. InFIGS. 6A, 6B and 6C, the display panel 110 may be a 60 Hz panel of7680×4320 resolution.

The processor 120 may include an image processor (scaler) for adjustingthe resolution of the content and a timing controller (TCON) forgenerating an input signal on the display panel 110. The image processorand the timing controller may be implemented as an independent IC. Thetiming controller may be included in the display panel 110.

In FIG. 6A, which is a diagram illustrating conventional technology, theimage processor may adjust the content with a resolution of 3840×2160 at60 Hz to a resolution of 7680×4320 based on the resolution of thedisplay panel 110. The timing controller may then output the contentwith the resolution of 7680×4320 at 60 Hz as is, and the display panel110 may output content at 60 Hz and to the resolution of 7680×4320.

In FIG. 6B, which also is a diagram illustrating conventionaltechnology, the image processor may adjust the content with a resolution3840×2160 at 120 Hz to a frame rate of 60 Hz and a resolution of7680×4320 based on the operating frequency and the resolution of thedisplay panel 110. The timing controller may then output the contentwith the resolution of 7680×4320 at 60 Hz as is, and the display panel110 may output content at 60 Hz and to a resolution of 7680×4320.

In FIG. 6C, which is a diagram illustrating an example embodiment of thedisclosure, the image processor may adjust the content with a resolutionof 3840×2160 at 120 Hz to a frame rate of 120 Hz and a resolution of7680×2160 based on the operating frequency and the resolution of thedisplay panel 110. The timing controller may then output the contentwith the resolution of 7680×2160 at 120 Hz to a frame rate of 120 Hz anda resolution of 7680×2160, and the display panel 110 may output contentat 120 Hz and to a resolution of 7680×4320 through the method ofconcurrently driving two adjacent gate lines.

FIG. 7 is a diagram illustrating an example method of outputting contentat various frame rates according to an embodiment of the disclosure.

In the above, using a bisect value of the vertical resolution of thedisplay panel 110 has been described for the convenience of description,but the embodiment is not limited thereto.

For example, if the display panel is a 60 Hz panel of 7680×4320resolution and a content with a resolution of 7680×4320 at 180 Hz isplayed back, the processor 120 may adjust the resolution of the contentto 7680×1440, and display one pixel line by concurrently driving threeadjacent gate lines 710 included in the display panel 110 as illustratedin FIG. 7 .

For example, through the method of concurrently driving three adjacentgate lines 710, the time in which one frame is displayed may be reducedfrom 1/60s to 1/180s. The display panel 110 may display 180 frames for 1second.

The operation may be variously performed based on the frame rate of thecontent. For example, if the display panel 110 is a 60 Hz panel of7680×4320 resolution and a content with a resolution of 7680×4320 at 240Hz is played back, the processor 120 may adjust the resolution of thecontent to 7680×1080, and display one pixel line by concurrently drivingfour adjacent gate lines included in the display panel 110. The displaypanel 110 may display 240 frames for 1 second.

In FIG. 7 , the method of adjusting the resolution and the number ofgate lines which may be concurrently driven being identified has beendescribed based on the operating frequency of the display panel 110 andthe frame rate of the content, but the embodiment is not limitedthereto. For example, the method of adjusting the resolution and thenumber of gate lines that are concurrently driven may be based on atleast one of the user command or the type of content.

For example, if the display panel is a 60 Hz panel of 7680×4320resolution and the content with a resolution of 7680×4320 at 240 Hz isbeing played back, the processor 120 may, based on a first user commandbeing input, adjust the resolution of the content to 7680×1080, andconcurrently drive the four adjacent gate lines included in the displaypanel 110 and display one pixel line. The content may be displayed at240 Hz.

The processor 120 may, based on a second user command being input,adjust the resolution of the content to 7680×2160, and concurrentlydrive two adjacent gate lines included in the display panel 110 todisplay one pixel line. The processor 120 may, by displaying only a partof the plurality of frames included in the content, display the contentat 120 Hz.

FIG. 8 is a flowchart illustrating an example method of controlling adisplay apparatus according to an embodiment of the disclosure.

The content is received (S810). Based on the frame rate of the receivedcontent being greater than the first frame rate of the display panel,the received content is adjusted to the second resolution (S820). Thecontent of the second resolution is displayed at the second frame rate,which is greater than the first frame rate (S830). The display panel maydrive the frame of the first resolution at the first frame rate.

The display panel may include the plurality of gate lines and theplurality of data lines, and the each of the plurality of data lines mayprovide data to a pixel in the same column, and the displaying (S830)may include concurrently driving two adjacent gate lines of theplurality of gate lines.

The displaying (S830) may include repeatedly displaying the one pixelline included in the content of the second resolution through twoadjacent gate lines of the plurality of gate lines.

The display panel may display one frame for a first time correspondingto the first frame rate, and the displaying (S830) may includedisplaying the one frame included in the content of the secondresolution for a second time, which is less than a first time andcorresponds to the second frame rate.

The adjusting (S820) may include adjusting the received content to thesecond resolution based on the equal value of the vertical resolution ofthe display panel.

The adjusting (S820) may include adjusting the horizontal resolution ofthe content based on the horizontal resolution of the display panel, andadjusting the vertical resolution of the content based on the equalvalue of the vertical resolution of the display panel.

Identifying the equal value of the vertical resolution of the displaypanel based on the frame rate and the first frame rate of the contentmay be further included.

The first frame rate may be a maximum frame rate which may be output bythe display panel, and the vertical resolution of the display panel maybe the number of pixels arranged in the vertical direction of theplurality of pixels included in the display panel.

The adjusting and displaying (S820, S830) may include, based on thecontent being a first type, adjusting the content to the secondresolution and displaying at the second frame rate, and based on thecontent being a second type, not adjusting the resolution of the contentand displaying at the first frame rate.

Based on the frame rate of the content being identical with the firstframe rate, performing frame interpolation on the content to increasethe frame rate of the content may be further included, and the adjusting(S820) may include adjusting the content to which the frame rate isincreased to the second resolution.

The adjusting (S820) may include, based on a user command of increasingthe frame rate being input, adjust the received content to the secondresolution.

According to various embodiments as described above, the displayapparatus may, by adjusting the resolution of the frame to reduce thetime in which the frame is displayed, improve the responsecharacteristic.

In addition, the display apparatus may be implemented at a low costbecause the display apparatus is capable of being operated at arelatively low operating frequency compared to the frame rate of thecontent.

With contents being produced at high resolution, the image qualityperceived by the user may not significantly deteriorate despite reducingthe vertical resolution of the content by half, and with the responsecharacteristic improved, a smoother image may be output.

According to an embodiment, the various embodiments described above maybe implemented as a software including instructions stored onmachine-readable storage media readable by a machine (e.g., computer).The machine, as an apparatus capable of calling an instruction stored ina storage medium and operating according to the called instruction, mayinclude an electronic apparatus (e.g., electronic apparatus A) accordingto the disclosed embodiments. Based on instructions being executed bythe processor, the processor may directly, or using other elements underthe control of the processor, perform a function corresponding to theinstruction. The instruction may include a code generated by a compileror a code executable by an interpreter. The machine-readable storagemedium may be provided in the form of a non-transitory storage medium.Herein, the ‘non-transitory’ a storage medium may not include a signaland is tangible, but does not distinguish data being semi-permanently ortemporarily stored in a storage medium.

According to an embodiment, the method according to various embodimentsdisclosed herein may be provided in a computer program product. Thecomputer program product may be exchanged between a seller and apurchaser as a commodity. The computer program product may bedistributed in the form of a machine-readable storage medium (e.g.,compact disc read only memory (CD-ROM)) or distributed online through anapplication store (e.g., PlayStore™). In the case of on-linedistribution, at least a portion of the computer program product may beat least temporarily stored in a storage medium such as a manufacturer'sserver, a server of an application store, or a memory of a relay server,or temporarily generated.

In addition, according to an embodiment, the various embodimentsdescribed above may be implemented in a computer or in a recordingmedium capable of reading with a similar apparatus using a software, ahardware or a combination of software and hardware. In some cases, theembodiments described herein may be implemented as a processor itself.Based on a software implementation, the embodiments according to theprocess and function described in the disclosure may be implemented asseparate software modules. Each of the software modules may perform oneor more function or operation described in the present disclosure.

The computer instructions for performing a processing operation of adevice according to the various embodiments described above may bestored in a non-transitory computer-readable medium. The computerinstructions stored in this non-transitory computer-readable medium mayhave, based on being executed by the processor of a specific device, mayhave a specific device perform a processing operation of other deviceaccording to the various embodiments described above. The non-transitorycomputer readable medium may refer, for example, to a medium that storesdata semi-permanently, and is readable by an device. Examples of anon-transitory computer-readable medium may include a compact disc (CD),a digital versatile disc (DVD), a hard disc, a Blu-ray disc, a universalserial bus (USB), a memory card, a read only memory (ROM), and the like.

In addition, each of the elements (e.g., a module or a program)according to the various embodiments described above may include asingle entity or a plurality of entities, and some sub-elements of theabovementioned sub-elements may be omitted, or another sub-element maybe further included in various embodiments. Alternatively oradditionally, some elements (e.g., modules or programs) may beintegrated into one entity and perform the same or similar functionsperformed by each respective element prior to integration. Theoperations performed by a module, a program, or other element, inaccordance with the various embodiments, may be performed sequentially,in a parallel, repetitively, or in a heuristically manner, or at leastsome operations may be performed in a different order, omitted, or mayfurther include a different operations.

While the disclosure has been illustrated and described with referenceto various example embodiments, it will be understood that the variousexample embodiments are intended to be illustrative, not limiting. Itwill be further understood by those skilled in the art that variouschanges in form and details may be made therein without departing fromthe true spirit and full scope of the disclosure, including the appendedclaims and their equivalents.

What is claimed is:
 1. A display apparatus, comprising: a display panelcomprising a plurality of gate lines each connected to pixels in a rowof the display panel and a plurality of data lines each connected topixels in a column of the display panel; a communication interfacecomprising circuitry configured to receive content; and a processorconfigured to: based on a frame rate of the received content beinggreater than a first frame rate of the display panel, control thedisplay panel to display the received content by concurrently drivingtwo or more gate lines of the plurality of gate lines for displaying onepixel line in a frame of the content of the second resolution.
 2. Thedisplay apparatus of claim 1, wherein the display panel is configured todrive a frame of a first resolution at the first frame rate, wherein theprocessor is configured to: adjust a horizontal resolution of thereceived content to a horizontal resolution of the display panel andadjust a vertical resolution of the received content to half of avertical resolution of the display panel, and control the display panelto display adjusted content at a second frame rate, the second framerate being greater than the first frame rate.
 3. The display apparatusof claim 2, wherein each of the plurality of data lines are configuredto provide data to a pixel of a same column.
 4. The display apparatus ofclaim 2, wherein the processor is configured to repeatedly display a onepixel line of the adjusted content through two adjacent gate lines ofthe plurality of gate lines.
 5. The display apparatus of claim 2,wherein the display panel is configured to display one frame for a firsttime corresponding to the first frame rate, and wherein the processor isconfigured to control the display panel to display one frame of theadjusted content for a second time, the second time being less than thefirst time and corresponding to the second frame rate.
 6. The displayapparatus of claim 2, wherein the first frame rate is a maximum framerate which the display panel is capable of outputting, and wherein thevertical resolution of the display panel is a number of pixels arrangedin a vertical direction of a plurality of pixels of the display panel.7. The display apparatus of claim 2, wherein the processor is configuredto: based on the content being a first type, adjust the horizontalresolution of the received content and vertical resolution of thereceived content, and based on the content being a second type, controlthe display panel to display the received content at the first framerate without adjusting the horizontal resolution of the received contentand vertical resolution of the received content.
 8. The displayapparatus of claim 2, wherein the processor is configured to: based on aframe rate of the content being identical to the first frame rate,increase the frame rate of the content by performing frame interpolationon the content, and adjust the horizontal resolution of the receivedcontent and vertical resolution of the received content.
 9. The displayapparatus of claim 2, wherein the processor is configured to, based onreceiving a command to increase a frame rate being input, adjust thehorizontal resolution of the received content and vertical resolution ofthe received content.
 10. A method of controlling a display apparatus,the method comprising: receiving content; and based on a frame rate ofthe received content being greater than a first frame rate of a displaypanel, displaying the received content by concurrently driving two ormore gate lines of a plurality of gate lines of the display panel, fordisplaying one pixel line in a frame of the content of the secondresolution, wherein the display panel comprises the plurality of gatelines each connected to pixels in a row of the display panel and aplurality of data lines each connected to pixels in a column of thedisplay panel.
 11. The display apparatus of claim 10, wherein thedisplay panel is configured to drive a frame of a first resolution atthe first frame rate, wherein the displaying the received contentcomprises: adjusting a horizontal resolution of the received content toa horizontal resolution of the display panel and adjusting a verticalresolution of the received content to half of a vertical resolution ofthe display panel; and displaying the adjusted content at a second framerate, the second frame rate being greater than the first frame rate. 12.The method of claim 11, wherein the displaying the adjusted contentcomprises concurrently driving two adjacent gate lines of the pluralityof gate lines.
 13. The method of claim 11, wherein the displaying theadjusted content comprises repeatedly displaying a one pixel line of theadjusted content through two adjacent gate lines of the plurality ofgate lines.
 14. The method of claim 11, wherein the display panel isconfigured to display a one frame for a first time corresponding to thefirst frame rate, and wherein the displaying the adjusted contentcomprises displaying a one frame of the adjusted content for a secondtime, the second time being less than the first time and correspondingto the second frame rate.
 15. The method of claim 11, wherein the firstframe rate is a maximum frame rate, which the display panel is capableof outputting, and wherein the vertical resolution of the display panelis a number of pixels arranged in a vertical direction of a plurality ofpixels of the display panel.
 16. The method of claim 11, wherein theadjusting and the displaying the adjusted content comprise, based on thecontent being a first type, adjusting the horizontal resolution of thereceived content and vertical resolution of the received content anddisplaying at the second frame rate, and based on the content being asecond type, displaying the content at the first frame rate withoutadjusting the horizontal resolution of the received content and verticalresolution of the received content.
 17. The method of claim 11, furthercomprising: based on a frame rate of the content being identical to thefirst frame rate, increasing the frame rate of the content by performingframe interpolation on the content, and wherein the adjusting comprisesadjusting the horizontal resolution of the received content and verticalresolution of the received content.
 18. The method of claim 11, whereinthe adjusting comprises, based on receiving a command to increase aframe rate being input, adjusting the horizontal resolution of thereceived content and vertical resolution of the received content.